204-Pin SODIMM DDR3 SDRAM
http://www.supertalent.com/oem Products and Specifications discussed herein are subject to change without notice
8 © 2006 Super Talent Tech., Corporation.
11.3 AC Timing Parameters & Specifications (con’t)
DDR3-1333
Parameter Symbol
min max
Units
Multi-Purpose Register Recovery Time tMPRR
1 - nCK
ACTIVE to PRECHARGE command period tRAS 36 70,000
ns
ACTIVE to ACTIVE command period for 1KB page size tRRD max(4tCK,6ns)
-
ACTIVE to ACTIVE command period for 2KB page size tRRD max(4tCK,7.5ns)
-
Four activate window for 1KB page size tFAW 30
- ns
Four activate window for 2KB page size tFAW 45
- ns
Command and Address setup time to CK, CK referenced to Vih(ac) / Vil(ac)
levels
tIS(base) 65 -
ps
Command and Address hold time from CK, CK referenced to Vih(ac) / Vil(ac)
levels
tIH(base) 140 -
ps
Command and Address setup time to CK, CK referenced to Vih(ac) / Vil(ac)
levels
tIS(base)AC150 65+125 -
ps
Control & Address Input pulse width for each input tIPW 620 -
ps
Calibration Timing
Power-up and RESET calibration time tZQinitI 512 -
tCK
Normal operation Full calibration time tZQoper 256 -
tCK
Normal operation short calibration time tZQCS 64 -
tCK
Reset Timing
Exit Reset from CKE HIGH to a valid command tXPR max(5tCK, tRFC+10ns) -
Self Refresh Timing
Exit Self Refresh to commands not requiring a locked DLL tXS max(5tCK,tRFC+ 10ns)
-
Exit Self Refresh to commands requiring a locked DLL tXSDLL tDLLK(min)
- nCK
Minimum CKE low width for Self refresh entry to exit timing tCKESR
tCKE(min) +
1tCK
-
Valid Clock Requirement after Self Refresh Entry (SRE) tCKSRE
max(5tCK,
10ns)
-
Valid Clock Requirement before Self Refresh Exit (SRX) tCKSRX
max(5tCK,
10ns)
-
Power Down Timing
Exit Power Down with DLL on to any valid command; Exit Precharge Power
Down with DLLfrozen to commands not requiring a locked DLL
tXP max(3tCK,6ns)
-
Exit Precharge Power Down with DLL frozen to commands requiring a locked
DLL
tXPDLL max(10tCK, 24ns)
-
CKE minimum pulse width tCKE max(3tCK, 5.625ns)
-
Command pass disable delay tCPDED 1 -
nCK
Power Down Entry to Exit Timing tPD tCKE(min) 9*tREFI
tCK
Timing of ACT command to Power Down entry tACTPDEN 1 -
nCK
Timing of PRE command to Power Down entry tPRPDEN 1 -
nCK
Timing of RD/RDA command to Power Down entry tRDPDEN RL + 4 +1
-
Timing of WR command to Power Down entry (BL8OTF, BL8MRS, BL4OTF) tWRPDEN WL + 4 +(tWR/tCK)
- nCK
Timing of WRA command to Power Down entry (BL8OTF, BL8MRS, BL4OTF) tWRAPDEN WL + 4 +WR+1
- nCK
Timing of WR command to Power Down entry (BL4MRS) tWRPDEN
WL + 2 +(tWR/
tCK(avg))
- nCK
