© National Instruments Corporation I-1 IMAQ PCI-1428 User Manual
Index
A
acquisition, scaling, and region-of-interest (ROI)
circuitry, 3-4
acquisition start conditions, 3-5
acquisition window control, 3-5
active pixel region (acquisition
window), 3-5
region of interest, 3-5
scaling down circuitry, 3-5
B
block diagram of IMAQ PCI-1428 (figure), 3-2
bus master PCI interface, 3-4
C
CameraLink,1-1to1-2
Channel Link, 1-2
clock specifications, A-1
configuration
flowchart (figure), 2-3
setting up IMAQ PCI-1428, 2-2
D
DAQ, integration with, 1-6
data formatter, multiple-tap, 3-3
delayed acquisition start conditions, 3-5
DMA controllers, 3-4
E
environment specifications, A-2
equipment, optional, 2-2
external connection specifications, A-1
F
frame/field selection, 3-5
H
hardware overview, 3-1 to 3-5
acquisition, scaling, ROI, 3-4
acquisition window control, 3-5
block diagram (figure), 3-2
board configuration NVRAM, 3-4
bus master PCI interface, 3-4
high-speed timing, 3-3
LUTs, 3-2
multiple-tap data formatter, 3-3
RS-232 serial interface, 3-3
scatter-gather DMA controllers, 3-4
SDRAM, 3-3
start conditions, 3-5
trigger control and mapping circuitry, 3-3
video acquisition, 3-4
high-speed timing circuitry, 3-3
I
IMAQ PCI-1428
optional equipment, 2-2
overview and features, 1-1 to 1-2
requirements for getting started, 2-1
software programming choices, 1-2 to 1-6
IMAQ Vision Builder, 1-5
IMAQ Vision, 1-5
NI-IMAQ driver software, 1-3 to 1-4
unpacking, 2-4
IMAQ Vision Builder, 1-5
with application development tools
(figure), 1-5
IMAQ Vision software, 1-5
