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benefits include reduced rack-space and power requirements, simplified single-point management and monitoring,
transparent service integration with routing, easy in-service software upgrade, and concurrent deployment of multiple
high-touch services. Taken together, these advantages can significantly simplify network design and lower the TCO.
The Cisco QuantumFlow Processor
At the heart of the innovation found in the Cisco ASR 1000 Series Routers is the new Cisco QuantumFlow Processor
(QFP). This processor combines the best attributes of both purpose-built application-specific integrated circuits
(ASICs) and general-purpose network processors--providing hardware-accelerated speed without sacrificing
flexibility.
Massive Parallel Processing: High-Performance Integrated Services
The Cisco QuantumFlow Processor is built around 40 custom Cisco QuantumFlow Processor Packet Processing
Engines (PPEs), each of which supports 4 threads of execution. With up to 160 independent processor threads
running in parallel, the Cisco QuantumFlow Processor can avoid the high CPU usage and excess latency found in
less-sophisticated hardware architectures. At a practical level, this architecture allows the processor to provide
concurrent deployment of multiple advanced services--such as Cisco IOS
®
Firewall, intrusion-detection services,
Network Address Translation (NAT), Flexible Packet Matching (FPM), and deep packet inspection--without accruing
the performance penalties usually associated with such services.
Advanced Memory Management: High-Bandwidth, Low-Latency Execution
With all this computational power at its disposal, the Cisco QuantumFlow Processor has been designed with a
sophisticated memory-management architecture to best enable its innovative capabilities.
With high-speed, multilevel instruction caches, the Cisco QuantumFlow Processor has immediate access to the
necessary code to apply multiple services to any packet. If many flows transiting the router require the same set of
services (often the case), the instruction memory for this service chain is readily available to the processor,
drastically decreasing the time spent processing any individual packet.
Furthermore, at any given time the PPEs on the Cisco QuantumFlow Processor have access to the entire packet,
not just packet headers, as is the case in other architectures. For complex operations such as deep packet
inspection, this access effectively eliminates several steps in the processing, dramatically reducing overall onboard
latency.
As applications such as unified communications, digital video, conferencing, and collaboration become more
interactive and real-time, the need to reduce latency is paramount. The user experience and acceptance of these
new, business-enhancing applications will hinge upon their responsiveness.
Customized Quality of Service: Enabling Consistent Service Delivery
With so many different flows passing through the Cisco QuantumFlow Processor, and at such high speed, advanced
quality-of-service (QoS) mechanisms are a prerequisite. The Cisco QuantumFlow Processor boasts more than
100,000 hardware queues that you can allocate in an arbitrary hierarchy, facilitating a sophisticated, tiered traffic-
management system that allows for application of multiple levels of QoS to a packet on a single pass through the
Cisco QuantumFlow Processor.
The Cisco QFP Traffic Manager can monitor millions of events per second across multiple channels, making it one of
the most accurate scheduling engines found in the industry today.
Even hardware resources external to the Cisco QuantumFlow Processor--such as the encryption engine, shared port
adapters (SPAs), and the route processor--can benefit from the sophisticated traffic-management capabilities of the
Cisco ASR 1000 Series Routers. Traffic to these devices is always queued in such a manner as to prevent
