xi
3.5 Advanced Chipset Features............................................. 32
Figure 3.4:Advanced chipset features screen ............... 33
3.5.1 DRAM Timing Selectable ............................................ 33
3.5.2 CAS Latency Time ....................................................... 33
3.5.3 Active to Precharge Delay ............................................ 33
3.5.4 DRAM RAS# to CAS# Delay ..................................... 33
3.5.5 DRAM RAS# Precharge............................................... 34
3.5.6 Memory Frequency....................................................... 34
3.5.7 System BIOS Cacheable............................................... 34
3.5.8 Video Bios Cacheable................................................... 34
3.5.9 Memory Hole At 15M-16M ......................................... 34
3.5.10 AGP Aperture Size (MB) ............................................. 34
3.5.11 Init Display First .......................................................... 34
3.5.12 On-Chip VGA............................................................... 34
3.5.13 On-Chip Frame Buffer Size.......................................... 34
3.6 Integrated Peripherals...................................................... 35
Figure 3.5:Integrated peripherals.................................. 35
Figure 3.6:On-Chip IDE Device................................... 35
3.6.1 IDE HDD Block Mode ................................................. 36
3.6.2 On-Chip IDE Device .................................................... 36
3.6.3 On-Chip Serial ATA..................................................... 36
3.6.4 Serial ATA Port0/Port1 Mode ...................................... 36
Figure 3.7:Onboard Device........................................... 36
3.6.5 USB Controller ............................................................. 37
3.6.6 USB 2.0 Controller ....................................................... 37
3.6.7 USB Keyboard/Mouse Support .................................... 37
3.6.8 AC97 Audio.................................................................. 37
3.6.9 Onboard LAN1 Control................................................ 37
3.6.10 Onboard LAN2 Control................................................ 37
3.6.11 Onboard LAN1 Boot ROM ......................................... 37
3.7 SuperIO Device ............................................................... 38
Figure 3.8:SuperIO Device ........................................... 38
3.7.1 Onboard FDC Controller .............................................. 38
3.7.2 Onboard Serial Port 1 ................................................... 38
3.7.3 Onboard Serial Port 2 ................................................... 38
3.7.4 UART Mode Select ...................................................... 38
3.7.5 RxD, TxD Active.......................................................... 38
3.7.6 IR Transmission Delay ................................................. 38
3.7.7 UR2 Duplex Mode........................................................ 39
3.7.8 Use IR Pins ................................................................... 39
3.7.9 Onboard Parallel Port.................................................... 39
3.7.10 Parallel Port Mode ........................................................ 39
3.7.11 EPP Mode Select .......................................................... 39
3.7.12 ECP Mode Use DMA ................................................... 39
3.7.13 PWRON After PWR-Fail ............................................. 39
