Advantech SOM-Express Design Guide
6 Table of Contents
Figure 5-31 Bend example ...........................................................67
Figure 5-32 10/100M Ethernet Interconnection ............................68
Figure 5-33 Gigabit Ethernet Interconnection...............................68
Figure 5-34 Critical Dimensions....................................................69
5.8 TV-Out ...................................................................................................70
5.8.1 Signal Descriptions.......................................................................70
Table 5.20 TV signals description.................................................70
5.8.2 Design Guidelines.........................................................................70
Figure 5-35 Connection of TV-out ................................................70
Figure 5-36 TV DAC Video Filter ..................................................71
Table 5-21 TV DAC Video filter component descriptions .............71
5.8.3 Layout Guidelines.........................................................................71
Figure 5-37 TV DAC Routing Topology ........................................72
5.9 Miscellaneous........................................................................................72
5.9.1 Miscellaneous Signal Descriptions ...............................................72
Table 5.22 Miscellaneous signal descriptions ..............................72
Figure 5-38 Speaker Connections................................................73
5.9.2 I2C Bus.........................................................................................74
Figure 5-39 I2C Bus Connections.................................................74
5.9.3 SMBus 74
Figure 5-40 SMB Bus Connections ..............................................75
5.9.4 Power Good/Reset Input ..............................................................75
Figure 5-41 Power OK/Reset Input Connections..........................75
5.9.5 WDT 75
Figure 5-42 Example of a watch-dog circuit .................................76
5.10 PCI Express Bus ...................................................................................77
5.10.1 Signal Description.........................................................................77
Table 5-23 PCIE Signal Description(General purpose) ...............77
Table 5-24 PEG Signal Description(x16 Graphics) .....................77
Table 5-25 Express Card Support ...............................................77
5.10.2 Design Guidelines.........................................................................78
Figure 5-43 PCI Express Interconnect Example...........................78
Table 5-26 PCI Express Capacitor Summary..............................78
Figure 5-44 Polarity Inversion on a TX to RX Interconnect ..........79
Figure 5-45 Lane Reversal and Polarity Inversion - TX to RX
Interconnect..................................................................................
79
Figure 5-46 Example of terminating unused PCI Express ports...80
5.10.3 Layout Guidelines.........................................................................81
Figure 5-47 Line equalization .......................................................81
Table 5-27 PCI Express Trace Width and Spacing for Micro-strip
and Strip-line.................................................................................
82
Figure 5-48 Example of “interleaved” and “non-interleaved” ........82
Figure 5-49 Topology #1 – SOM Express to PCI Express Device
Down ............................................................................................
83
Table 5-28 SOM Express to PCI Express ....................................83
Figure 5-50 Topology #2 and #3 – SOM Express to Express Card
or Docking Conn...........................................................................
83
Table 5-29 SOM Express to Express Card...................................83
5.11 Serial ATA .............................................................................................84
5.11.1 Signal Description.........................................................................84
Table 5-30 Serial ATA Signal Description ....................................84
5.11.2 Design Guidelines.........................................................................84
Figure 5-51 SATA interconnect example......................................84
Figure 5-52 ATA_ACT# Circuit Example ......................................85
5.11.3 Layout Guidelines.........................................................................85
